C82-1024 capable of a certain amount of parallel processing . We are then permitted to assume
C80-1022 example is simulated with pseudo parallel processing . We also use micro-actor SIMTW
C90-2050 Furthermore the basic mechanisms for the parallel processing of syntactic segments are presented
C00-2164 there . In such an architecture parallel processing can be achieved in a convenient
C80-1022 is impossible to implement the parallel processing by using a CPU machine . For
C88-1049 superior to backtracking or to parallel processing of every path . A common version
A92-1006 implementation can be exploited by parallel processing of independent modules . While
C90-2010 be the same . 3 . Suitable for parallel processing The processes are head driven
C88-2122 of POPEL 's architecture is the parallel processing approach to generation : the
C00-2164 fashion . 3.2 Parallel processing Parallel processing can be found on various levels
C00-2164 in a convenient fashion . 3.2 Parallel processing Parallel processing can be found
C90-2053 's algorithm is compatible with parallel processing , we can easily develop a parallel
C82-1019 comma sign for an illustration . PARALLEL PROCESSING LEVELS Morphological analysis
C80-1022 acquaintances are shown in boxes . Pseudo parallel processing can be easily implemented . This
C90-2050 such reformulations . Unified parallel processing : Every segment at each level
C90-2053 breadth-first strategy is compatible with parallel processing , we can easily develop a parallel
C67-1003 increase is irrelevant . Besides the parallel processing one must also consider reversi
C86-1031 their approach requires massively parallel processing , currently beyond the state
C00-2164 along with an incremental and parallel processing behaviour are the crucial features
C86-1113 constraints , ( b ) a high degree of parallel processing , and ( c ) the necessity for
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